Check vl first
The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.
VNCLIPU.WI
RISC-V VNCLIPU.WI Instruction Details
Instruction ManualI-typeVNCLIPU.WI is an RVV unsigned fixed-point narrowing clip instruction that rounds a 2*SEW source with vxrm and saturates to SEW.
Instruction Syntax
vnclipu.wi vd, vs2, uimm, vm
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VVector Fixed-PointNarrowing/Clip
Instruction Behavior
VNCLIPU.WI reads each active 2*SEW-wide vs2 element, performs a fixed-point rounded right shift using a shift amount from the 5-bit unsigned uimm, then clips into the unsigned SEW range and writes the SEW-wide vd result; any active saturation sets sticky vxsat.
VNCLIPU.WI Decode And Execute Animation
Starts from OP-V encoding fields, then shows how VNCLIPU reads 2*SEW-wide vs2, rounded-shifts right using the shift amount and vxrm, saturates into a unsigned SEW-wide vd result, and sets vxsat on saturation.
Instruction input
vnclipu.wi
immediate value
3 -> shamt 3
5-bit unsigned uimm; shift count uses low lg2(2*SEW) bitsOP-V encodingvnclipu.wi
funct6
101110
vm
0
vs2
01000
uimm
00011
funct3
011
vd
00100
opcode
1010111
lane
0
1
2
3
4
5
6
7
v8
0x00000123
0x00001ff0
0x000000ff
0x7fffffff
0x00000100
0x00000007
0x00000123
0x00001ff0
clip>>
clip>>
clip>>
clip>>
clip>>
clip>>
clip>>
clip>>
imm
0x0003
0x0003
0x0003
0x0003
0x0003
0x0003
0x0003
0x0003
v0.t
1
0
1
1
1
0
1
1
v4
...
-
...
...
...
-
...
...
vxsat
0
0
0
1
0
0
0
0
Current step
Show OP-V 32-bit encoding fields
vnclipu.wi uses OP-V encoding. The animation places fixed fields, register fields, vm, and the uimm field in one encoding strip.
This animation shows only ISA-visible relationships from the official V extension: OP-V field decode, active-element reads, 2*SEW-to-SEW narrowing clip integer unsigned narrowing clip, vxrm fixed-point rounding, and vd writeback; this example sets sticky vxsat. It does not model pipelines, caches, or timing.
Quick Understanding & Search Notes
VNCLIPU.WI narrows a wide fixed-point intermediate back to SEW width: it applies a rounded right shift using the shift amount and vxrm, clips to the unsigned destination range, and records active-element saturation in vxsat.
The WI form uses OP-V encoding; funct6=101110, and funct3=011 selects the .wi operand form.
Source vs2 elements are interpreted at 2*SEW width and destination vd elements are SEW wide; the shift amount comes from the 5-bit unsigned uimm.
Rounding is controlled by vxrm mode rnu, rne, rdn, or rod, followed by saturation into the unsigned destination range.
Only body elements within current vl and enabled by the execution mask participate; elements disabled by v0.t do not participate in this instruction's vxsat decision.
VNCLIPU does not set floating-point exception flags and does not use floating-point frm rounding.
Vector Execution Context
When reading VNCLIPU.WI, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. The suffix and operand form determine whether sources are vector, scalar, or immediate values.
Then check vtype
The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.
Then check vm/v0
For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.
Common Usage Scenarios
Fixed-point result narrowing
Understand this scenario with real code like «vnclipu.wi v8, v12, 3, v0.t».
Vector DSP scaled output
Understand this scenario with real code like «vnclipu.wi v8, v12, 3, v0.t».
Wide-to-narrow conversion that needs a saturation flag
Understand this scenario with real code like «vnclipu.wi v8, v12, 3, v0.t».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
VNCLIPU.WI uses 2*SEW-wide vs2 elements and writes SEW-wide vd results; do not read it as an ordinary single-width shift.
Rounding comes from the V extension fixed-point CSR vxrm, not floating-point frm.
VNCLIPU clips into the unsigned range; sticky vxsat is set only when an active element saturates.
FAQ
How is VNCLIPU.WI different from VNSRL/VNSRA?
VNCLIPU.WI rounds shifted-out bits using vxrm and saturates with vxsat when the result is outside the unsigned SEW range; VNSRL/VNSRA are narrowing shifts without saturation clipping.
When does VNCLIPU.WI set vxsat?
This instruction sets sticky vxsat when any active element has a rounded shifted result outside the unsigned SEW range and is clipped. Elements disabled by v0.t do not participate in that decision.