Does VSSRL.VI set vxsat?
Scaling shifts use vxrm rounding but are not saturating clip instructions; use VNCLIP for saturating narrowing.
VSSRL.VI
RISC-V VSSRL.VI Instruction Details
Instruction ManualI-typeElement-wise scaling logical right shift.
Instruction Syntax
vssrl.vi vd, vs2, uimm, vm
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
VVector Operations
Instruction Behavior
VSSRL.VI applies an element-wise scaling logical right shift using the shift amount from uimm and writes vd. Scaling shifts use vxrm to round shifted-out bits.
Quick Understanding & Search Notes
VSSRL.VI is a fixed-point scaling vector shift instruction; the shift amount uses only the architecturally specified low bits.
VSSRL/VSSRA use vxrm to round shifted-out bits.
Logical right shift shifts zeros into high bits.
VI/VV/VX forms take shift amounts from an immediate, vector elements, or a scalar register respectively.
Common Usage Scenarios
Bit Operations & Masks
Understand this scenario with real code like «vssrl.vi v8, v12, 3, v0.t».
Data Storing
Understand this scenario with real code like «vssrl.vi v8, v12, 3, v0.t».
Vector Operations
Understand this scenario with real code like «vssrl.vi v8, v12, 3, v0.t».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
This is a rounding/scaling shift, not a saturating shift.
Rounding follows vxrm; vxsat is not set by this instruction.