What is rs2 in VSETVL?
rs2 holds the full vtype value, including vill, vma, vta, vsew, and vlmul bits; it is not the textual immediate used by vsetvli.
VSETVL
RISC-V VSETVL Instruction Details
Instruction ManualR-typeSet vl/vtype using register AVL and vtype.
Instruction Syntax
vsetvl rd, rs1, rs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
VVector Configurationvset Instructions
Related Search Terms
Instruction Encoding
31..25
funct7
24..20
rs2
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode
VSETVL uses opcode 1010111 (0x57), funct3 111. The rs1 and rs2 fields select the two source registers, and rd selects the destination register.
Format: R-type
opcode: 1010111 (0x57)
funct3: 111 (0x7)
Instruction Behavior
VSETVL selects new vl and vtype from AVL in rs1 and a vtype value in rs2, then writes the new vl to rd.
Quick Understanding & Search Notes
VSETVL is an RVV configuration instruction that determines vl and vtype for following vector instructions.
AVL comes from rs1 and the new vtype value comes from rs2.
The resulting vl is written to rd; with rd=x0 it is not kept in an integer register.
VSETVL is the register-vtype form commonly used to restore a saved vector configuration.
Common Usage Scenarios
Context Switch
Understand this scenario with real code like «vsetvl t0, a0, a1».
Vector State Restore
Understand this scenario with real code like «vsetvl t0, a0, a1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
All XLEN bits of the vtype value in rs2 must be checked.
The rs1=x0, rd=x0 keep-vl form is only valid when VLMAX is unchanged and prior vill=0.
The vtype value comes from rs2; e32/m1/ta/ma are not written directly in the vsetvl assembly operands.