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VSETVL

RISC-V VSETVL Instruction Details

Instruction ManualR-type

Configure vl/vtype from rs1/rd AVL rules and the full vtype value in rs2, then write the selected vl

Instruction Syntax

vsetvl rd, rs1, rs2
Operand Breakdown
rd: receives the selected new vl.
rs1: supplies AVL.
rs2: supplies the full vtype value, not textual immediates such as e32/m1/ta/ma.
VVector Configurationvset Instructions

Instruction Behavior

VSETVL is the register-vtype RVV configuration form. Like VSETVLI, it derives AVL from the rs1/rd combination. Ordinary AVL form: rs1 is nonzero, AVL=x[rs1]. VLMAX request form: rs1=x0, rd must be nonzero. Keep current vl form: rd=x0, rs1=x0, valid only when VLMAX is unchanged and prior vtype.vill=0. rs2 supplies the full vtype value, not textual assembly fields such as e32/m1/ta/ma. The instruction checks vtype under the official rules, selects the new vl, updates vl/vtype, and writes the selected vl to rd.

VSETVL Decode And Execute Animation

Decode the vset fields, derive AVL and vtype, then show the architectural vl/vtype/rd update.

Step 1 / 6

Encoding

VSETVL is an OP-V configuration instruction. This step shows the opcode, funct3, and the fields carrying AVL/vtype information.

Instruction input
vsetvl
Scope: this animation shows only the ISA-visible vl/vtype selection rules from the V extension. Demo VLMAX and mid-range vl choice are educational inputs, not claims about a processor's VLEN, ELEN, support matrix, or OS handling.
Encoding fieldsvsetvl / OP-V
31..25
funct7
1000000
24..20
rs2
01011
19..15
rs1
01010
14..12
funct3
111
11..7
rd
00101
6..0
opcode
1010111
asm
form
VSETVL
Configuration data path
AVL source
x10
AVL
40
VLMAX
16
selected vl
16
vtype
e32, m1, ta, ma
x5
16
Current configuration summary
vl result
16
policy
ta/ma
vl selection result
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
The demo selects vl=16 from AVL=40 and VLMAX=16. Green cells show the body element range after configuration.

Quick Understanding & Search Notes

VSETVL supplies vtype from a register instead of a vtypei immediate. It still derives AVL from the rs1/rd combination. Ordinary AVL form reads the requested element count from rs1. VLMAX request form: rs1=x0, rd must be nonzero. Keep current vl form: rd=x0, rs1=x0. This form is useful for restoring vector state from a full vtype value held in an integer register.

The OP-V opcode is 1010111 with funct3=111; rs2 supplies the full vtype value.
AVL is derived from the rs1/rd combination. Ordinary AVL form: rs1 nonzero, use x[rs1]. VLMAX request form: rs1=x0, rd must be nonzero. Keep current vl form: rd=x0, rs1=x0.
The official rules require all XLEN bits of the vtype value in rs2 to be checked, not just the low fields.
The rd=x0, rs1=x0 keep-vl form is constrained by unchanged VLMAX and a legal vtype.
Unsupported vtype follows the official vill and vl=0 result.

Vector Execution Context

When reading VSETVL, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. The suffix and operand form determine whether sources are vector, scalar, or immediate values.

Check vl first

The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.

Then check vtype

The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.

Then check vm/v0

For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.

Official source: RISC-V V Standard Extension for Vector Operations

Common Usage Scenarios

Context Switch

Understand this scenario with real code like «vsetvl t0, a0, a1 # AVL from a0, vtype value from a1».

Vector State Restore

Understand this scenario with real code like «vsetvl t0, a0, a1 # AVL from a0, vtype value from a1».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

All XLEN bits of the vtype value in rs2 must be checked.
The rd=x0, rs1=x0 keep-vl form is only valid when VLMAX is unchanged and prior vill=0.
The vtype value comes from rs2; e32/m1/ta/ma are not written directly in the vsetvl assembly operands.

FAQ

Is rs2 an ordinary data source operand for VSETVL?

No. The value in rs2 is interpreted as a full vtype configuration for SEW, LMUL, vta, vma, and related state.

Why is VSETVL useful for state restore?

Because save/restore code can place a saved vtype value in rs2 and use VSETVL to rebuild a consistent vl/vtype state.

Does VSETVL always take AVL from rs1?

No. Ordinary AVL form: rs1 nonzero, AVL=x[rs1]. VLMAX request form: rs1=x0, rd must be nonzero. Keep current vl form: rd=x0, rs1=x0.