Is VSLIDEDOWN.VI a memory move?
No. It moves data among vector-register elements and does not access memory.
VSLIDEDOWN.VI
RISC-V VSLIDEDOWN.VI Instruction Details
Instruction ManualI-typeSlide vector elements toward lower indexes.
Instruction Syntax
vslidedown.vi vd, vs2, imm, vm
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
VVector PermutationSlide
Related Search Terms
Instruction Behavior
VSLIDEDOWN.VI moves vs2 elements by offset uimm toward lower indexes into vd. A source index outside VLMAX writes zero to the destination element.
Quick Understanding & Search Notes
VSLIDEDOWN.VI moves element positions within a vector register, useful for windows, shift-register patterns, and boundary insertion.
VSLIDEDOWN reads from higher-numbered source elements: vd[i] = vs2[i+OFFSET].
A source index beyond VLMAX produces zero.
The instruction may be masked; inactive and tail elements follow current policies.
Common Usage Scenarios
Data Shift
Understand this scenario with real code like «vslidedown.vi v8, v12, 3, v0.t».
Convolution
Understand this scenario with real code like «vslidedown.vi v8, v12, 3, v0.t».
Shift Register
Understand this scenario with real code like «vslidedown.vi v8, v12, 3, v0.t».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
OFFSET is a 5-bit zero-extended immediate.
When i+OFFSET >= VLMAX, the result element is zero.
Unlike vslideup, vslidedown has no destination/source non-overlap restriction.