Is VSLIDEUP.VI a memory move?
No. It moves data among vector-register elements and does not access memory.
VSLIDEUP.VI
RISC-V VSLIDEUP.VI Instruction Details
Instruction ManualI-typeSlide vector elements toward higher indexes.
Instruction Syntax
vslideup.vi vd, vs2, imm, vm
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
VVector PermutationSlide
Related Search Terms
Instruction Behavior
VSLIDEUP.VI moves vs2 elements by offset uimm toward higher indexes into vd. Destination elements below the offset are unchanged; other active elements are taken from lower-numbered source elements.
Quick Understanding & Search Notes
VSLIDEUP.VI moves element positions within a vector register, useful for windows, shift-register patterns, and boundary insertion.
Slideup-class instructions have destination/source overlap restrictions to avoid writes destroying later reads.
VSLIDEUP moves source elements into higher-numbered destination positions; destination elements below the offset are unchanged.
vm=0 uses v0 as the execution mask; inactive and tail elements follow current policies.
Common Usage Scenarios
Data Shift
Understand this scenario with real code like «vslideup.vi v8, v12, 3, v0.t».
Convolution
Understand this scenario with real code like «vslideup.vi v8, v12, 3, v0.t».
Shift Register
Understand this scenario with real code like «vslideup.vi v8, v12, 3, v0.t».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
The destination vector register group cannot overlap the source group.
OFFSET is a 5-bit zero-extended immediate.
Destination elements 0..OFFSET-1 remain unchanged.