Does VSRA.VV set vxsat?
No. Ordinary shifts do not use the fixed-point saturation flag.
VSRA.VV
RISC-V VSRA.VV Instruction Details
Instruction ManualR-typeElement-wise arithmetic right shift.
Instruction Syntax
vsra.vv vd, vs2, vs1, vm
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
VVector Operations
Related Search Terms
Instruction Behavior
VSRA.VV applies an element-wise arithmetic right shift using the shift amount from vs1[i] and writes vd.
Quick Understanding & Search Notes
VSRA.VV is a ordinary vector shift instruction; the shift amount uses only the architecturally specified low bits.
Ordinary VSLL/VSRL/VSRA do not use vxrm rounding.
Arithmetic right shift preserves sign-extension semantics.
VI/VV/VX forms take shift amounts from an immediate, vector elements, or a scalar register respectively.
Common Usage Scenarios
Bit Operations & Masks
Understand this scenario with real code like «vsra.vv v8, v12, v4, v0.t».
Data Storing
Understand this scenario with real code like «vsra.vv v8, v12, v4, v0.t».
Vector Operations
Understand this scenario with real code like «vsra.vv v8, v12, v4, v0.t».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
The shift amount comes from vs1[i]; only the architecturally specified low bits are used.
Arithmetic right shift preserves the sign bit.
Ordinary shifts do not use vxrm and do not set vxsat.