VWADD.WV

RISC-V VWADD.WV Instruction Details

Instruction ManualV-type

Signed widening add with 2*SEW results.

Instruction Syntax

vwadd.wv vd, vs2, vs1, vm
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VVector Operations

Instruction Behavior

VWADD.WV adds a signed 2*SEW-wide vs2 source to an SEW-wide vs1 source sign-extended to 2*SEW, then writes a 2*SEW-wide result.

VWADD.WV Decode And Execute Animation

Starts from OP-V encoding fields, then shows how VWADD adds a sign-extended SEW second source to a 2*SEW-wide vs2 value and writes a 2*SEW-wide vd result.

Instruction input
vwadd.wv

The teaching model fixes LMUL=m1 and vstart=0 and shows only body elements in the selected VL. The wide vd destination has EMUL=2 and must start at an even register; if it overlaps a SEW source, that source must be the highest-numbered register in the destination group. Such a legal different-EEW overlap is mask- and tail-agnostic regardless of vtype.vma/vta.In ordinary masked forms, inactive and tail elements follow vtype.vma/vta and the result row does not invent a definite value; VADC/VMADC/VSBC/VMSBC execute every body element, with v0 bits used only as carry/borrow-in.

OP-V encodingvwadd.wv
funct6
110101
vm
0
vs2
01000
vs1
01100
funct3
000
vd
00100
opcode
1010111
lane
0
1
2
3
4
5
6
7
v8
0x80000020
0x00007fff
0xffffffee
0x00001020
0x80000020
0x00007fff
0xffffffee
0x00001020
w+
w+
w+
w+
w+
w+
w+
w+
v12
0xffff
0x0001
0xfffd
0x0013
0xffff
0x0001
0xfffd
0x0013
v0.t
1
0
1
1
1
0
1
1
v4
...
-
...
...
...
-
...
...
Current step

Show OP-V 32-bit encoding fields

vwadd.wv uses OP-V encoding. The animation places fixed fields, register fields, vm, and the vs1 field in one encoding strip.

This animation shows only ISA-visible relationships from the official V extension: OP-V field decode, active-element reads, 2*SEW widening integer signed widening addition, mask control, and vd writeback. It does not model pipelines, caches, or timing.

Quick Understanding & Search Notes

VWADD.WV uses an already 2*SEW-wide vs2 source and adds a sign-extended SEW-wide vs1 value; it does not read old vd.

Destination elements are 2*SEW wide.
In W forms, vs2 is already wide and the second operand is extended from single width before addition.
Signed forms use sign extension.

Vector Execution Context

When reading VWADD.WV, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. The suffix and operand form determine whether sources are vector, scalar, or immediate values.

Check vl first

The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.

Then check vtype

The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.

Then check vm/v0

For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.

Official source: RISC-V V Standard Extension for Vector Operations

Common Usage Scenarios

Vector Integer Arithmetic

Understand this scenario with real code like «vwadd.wv v8, v12, v4, v0.t».

Widening Operations

Understand this scenario with real code like «vwadd.wv v8, v12, v4, v0.t».

Vectorized Loops

Understand this scenario with real code like «vwadd.wv v8, v12, v4, v0.t».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is V-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

In W forms, vs2 is already a 2*SEW-wide source.
The second operand is sign-extended before addition.
Destination elements remain 2*SEW wide.

FAQ

Is VWADD.WV an accumulator instruction?

No. It forms its result only from the current vs2 and vs1 sources and does not read old vd as an accumulator.