Check vl first
The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.
VWSUBU.VV
RISC-V VWSUBU.VV Instruction Details
Instruction ManualR-typeVWSUBU.VV performs unsigned widening subtract; SEW source elements are zero-extended and written as 2*SEW-wide results.
Instruction Syntax
vwsubu.vv vd, vs2, vs1, vm
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VVector Operations
Instruction Behavior
vwsubu.vv is a RISC-V V extension vector-vector unsigned widening subtract instruction. For active elements, the SEW values from vs2 and vs1 are zero-extended to 2*SEW, then subtracted and written to the 2*SEW-wide vd destination.
VWSUBU.VV Decode And Execute Animation
Starts from OP-V encoding fields, then shows how VWSUBU zero-extends SEW source elements, subtracts at 2*SEW width, and writes vd.
Instruction input
vwsubu.vv
OP-V encodingvwsubu.vv
funct6
110010
vm
0
vs2
01000
vs1
01100
funct3
000
vd
00100
opcode
1010111
lane
0
1
2
3
4
5
6
7
v8
0x00fa
0x010b
0x011c
0x012d
0x013e
0x014f
0x0160
0x0171
w-
w-
w-
w-
w-
w-
w-
w-
v12
0x000d
0x0016
0x001f
0x0028
0x0031
0x003a
0x0043
0x004c
v0.t
1
0
1
1
1
0
1
1
v4
...
-
...
...
...
-
...
...
Current step
Show OP-V 32-bit encoding fields
vwsubu.vv uses OP-V encoding. The animation places fixed fields, register fields, vm, and the vs1 field in one encoding strip.
This animation shows only ISA-visible relationships from the official V extension: OP-V field decode, active-element reads, 2*SEW widening integer unsigned widening subtraction, mask control, and vd writeback. It does not model pipelines, caches, or timing.
Quick Understanding & Search Notes
VWSUBU.VV is not ordinary SEW-wrapping subtraction: it first zero-extends both source elements, then keeps the subtraction result in a 2*SEW-wide destination element.
Official syntax is `vwsubu.vv vd, vs2, vs1, vm`; vm=1 is unmasked, while vm=0 uses v0.t to select active elements for this instruction.
For this batch's .vv/.vx forms, both source operands are SEW-wide, are zero-extended to 2*SEW, and are then subtracted.
Destination elements are 2*SEW wide and destination EMUL is twice the source EMUL; this is not an accumulator instruction that reads old vd.
Tail elements and masked-off elements follow the current vtype tail/mask policy; the mnemonic alone does not imply fixed zeroing.
Vector Execution Context
When reading VWSUBU.VV, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. .vv: two vector sources participate element by element.
Then check vtype
The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.
Then check vm/v0
For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.
Common Usage Scenarios
Vector Integer Arithmetic
Understand this scenario with real code like «vwsubu.vv v8, v12, v4, v0.t».
Widening Operations
Understand this scenario with real code like «vwsubu.vv v8, v12, v4, v0.t».
Vectorized Loops
Understand this scenario with real code like «vwsubu.vv v8, v12, v4, v0.t».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Non-.w forms widen both SEW source operands before subtraction.
The result is a 2*SEW integer subtraction; it does not use vxrm and does not set vxsat.
The destination group is wider and must satisfy V extension EMUL and overlap constraints.
FAQ
How is VWSUBU.VV different from ordinary subtraction?
VWSUBU.VV zero-extends SEW source elements and produces a 2*SEW-wide result; ordinary single-width vector subtraction writes only a SEW-wide result.
Does VWSUBU.VV read old vd as an accumulator?
No. This page covers the .vv/.vx widening add/subtract form, where the result is computed from the current source operands and written to vd; see the .wv/.wx related instructions for wide-source forms.