hstatus is an HSXLEN-bit hypervisor status CSR controlling exception and virtualization state for a VS-mode guest.
On RV64, controls the effective XLEN for VS-mode.
VSXL (bits 33:32) — On RV64, controls the effective XLEN for VS-mode.
Effective XLEN is 32.
Effective XLEN is 64.
Reserved encoding; portable software must not write or depend on it.
Controls whether VS-mode SRET raises a virtual-instruction exception.
VTSR (bit 22) — Controls whether VS-mode SRET raises a virtual-instruction exception.
VS-mode SRET is not intercepted by VTSR.
VS-mode SRET raises a virtual-instruction exception.
Controls virtual-instruction exception behavior for VS-mode WFI.
VTW (bit 21) — Controls virtual-instruction exception behavior for VS-mode WFI.
VS-mode WFI is not intercepted by VTW.
VS-mode WFI may raise a virtual-instruction exception under the bounded-time rule.
Controls VS-mode access to satp or address-translation fence instructions.
VTVM (bit 20) — Controls VS-mode access to satp or address-translation fence instructions.
VS-mode may access satp and execute related address-translation fences subject to other rules.
VS-mode access to satp or execution of SFENCE.VMA/SINVAL.VMA raises a virtual-instruction exception.
Selects the guest external interrupt source for VS-level external interrupts; when GEILEN=0 or the value is greater than GEILEN, it does not represent a valid guest source.
VGEIN (bits 17:12) — Selects the guest external interrupt source for VS-level external interrupts; when GEILEN=0 or the value is greater than GEILEN, it does not represent a valid guest source.
No guest external interrupt source is selected for VS-level external interrupts; if GEILEN=0, no valid guest source exists to select.
Selects the corresponding numbered guest external interrupt source; only 1..GEILEN denotes a valid implemented source, and values greater than GEILEN do not represent a valid guest source.
Controls whether hypervisor load/store instructions may be used in U-mode.
HU (bit 9) — Controls whether hypervisor load/store instructions may be used in U-mode.
U-mode execution of hypervisor load/store instructions raises an illegal-instruction exception.
U-mode may execute hypervisor load/store instructions the same as HS-mode.
Records or controls effective privilege for virtual-machine load/store instructions.
SPVP (bit 8) — Records or controls effective privilege for virtual-machine load/store instructions.
Virtual-machine load/store instructions use VU effective privilege.
Virtual-machine load/store instructions use VS effective privilege.
Records virtualization mode at a trap into HS.
SPV (bit 7) — Records virtualization mode at a trap into HS.
V was 0 before the trap into HS.
V was 1 before the trap into HS; SRET can restore virtualization mode under the rules.
Indicates whether stval holds a guest virtual address.
GVA (bit 6) — Indicates whether stval holds a guest virtual address.
The address in stval is not a guest virtual address.
The address in stval is a guest virtual address.
Controls endianness for VS-mode explicit accesses and implicit VS-stage page-table accesses.
VSBE (bit 5) — Controls endianness for VS-mode explicit accesses and implicit VS-stage page-table accesses.
VS-mode explicit memory accesses and VS-stage memory-management implicit accesses are little-endian.
VS-mode explicit memory accesses and VS-stage memory-management implicit accesses are big-endian.
hstatus is a hypervisor status CSR. It is HS/M-side hypervisor state, not a VS supervisor CSR copy; guest access is governed by the H extension and relevant state-enable, AIA, Sstc, or Smcsrind rules.
Confirm the current software is in an M/HS context that may access Hypervisor CSRs.
Confirm that the H, AIA, Sstc, Smstateen, Smcsrind, or other defining extension is implemented.
Read or write only official fields; whether guest-related access succeeds or traps is controlled by the corresponding extension rules and state-enable state.
Do not treat hstatus as a VS CSR copy. It is an H-level CSR; whether guest/VS access to related functionality traps is defined by the H extension and the relevant optional extension.
When VTVM=1, VS-mode execution of SFENCE.VMA/SINVAL.VMA or access to satp raises a virtual-instruction exception.