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BEXTI

RISC-V BEXTI Instruction Details

Instruction ManualI-type

Extract single bit by immediate index

Instruction Syntax

bexti rd, rs1, shamt

rd and rs1 select x0–x31; sources are read before writeback, and x0 writes are discarded.

shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved. It is not a signed 12-bit operand.

Requires Zbs 1.0 on RV32/RV64; the extracted result is 0 or 1 without retaining the original bit position.

ZbsBit ManipulationSingle-Bit Operation

Instruction Behavior

bexti is a Zbs single-bit extract instruction. The bit index comes from the immediate field.

BEXTI Decode And Execute Animation

Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.

rd
rs1
shamt
bexti
,
,
Execution Context

This example uses fixed initial register values and PC=0x2000; instruction fetch succeeds, with no asynchronous interrupt or extra extension checks. Exception branches stop ordinary commit; post-trap PC and handler state are EEI-dependent.

a0(x10)
0x00001000
31..25
24..20
19..15
14..12
11..7
6..0
0100100
fixed imm[11:5]
01100
shamt[4:0]
01010
rs1
101
funct3
00101
rd
0010011
opcode
Execution Data Path
instruction
0x48C55293
opcode
0010011 -> OP-IMM
funct3
101 -> BEXTI
imm[11:5]
imm[11:5]=0100100 fixed
rd / rs1
t0(x5) / a0(x10)=0x00001000
imm[11:5] + shamt[4:0]
imm[11:5]=0100100 fixed -> index=12
single-bit extract
Not computed
x5
t0(x5) = 0x00003001; pc = 0x00002000
Current Step

Concept Step: receive the 32-bit instruction encoding

The machine code is split by the current instruction format; the animation starts from encoding/decode.

encoding: 0x48C55293
syntax : bexti t0(x5), a0(x10), 12
Pending result: Not computed
Current architectural state
t0(x5) = 0x00003001; pc = 0x00002000

This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.

Quick Understanding & Search Notes

bexti is a Zbs single-bit extract instruction. The bit index comes from the immediate field.

This instruction belongs to Zbs 1.0 on RV32 and RV64 and operates on XLEN-bit integer register values.
shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved.
bext/bexti returns 0 or 1; it does not preserve the original bit position.

Common Usage Scenarios

Bit Operations & Masks

RV32/RV64 Zbs, x11=0x84: bexti x10, x11, 2 extracts bit 2 and writes x10=1, rather than 4.

Pre-Use Checklist

Syntax Check
  • rd and rs1 select x0–x31; sources are read before writeback, and x0 writes are discarded.
  • shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved. It is not a signed 12-bit operand.
Semantic Check
  • Requires Zbs 1.0 on RV32/RV64; the extracted result is 0 or 1 without retaining the original bit position.

Pitfalls / Common Confusions

shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved.
bext/bexti returns 0 or 1; it does not preserve the original bit position.

FAQ

Does bexti access memory?

No data-memory access occurs. The data operation reads integer registers and writes rd; a result directed to x0 is discarded.

How is the bit index selected for bexti?

The immediate encodes the bit position directly, with the legal range determined by XLEN.