Does binvi access memory?
No. It reads integer register operands and writes rd only.
BINVI
RISC-V BINVI Instruction Details
Instruction ManualI-typeInvert single bit by immediate index
Instruction Syntax
binvi rd, rs1, uimm
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
BZbsBit ManipulationSingle-Bit Operation
Related Search Terms
Instruction Encoding
31..20
imm[11:0]
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode
BINVI uses opcode 0010011 (0x13), funct3 001, funct7 0110100. The rs1 field selects the source register, the 12-bit immediate provides the second operand, and rd selects the destination.
Format: I-type
opcode: 0010011 (0x13)
funct3: 001 (0x1)
funct7: 0110100 (0x34)
Instruction Behavior
binvi is a Zbs single-bit invert instruction. The bit index comes from the immediate field.
Quick Understanding & Search Notes
binvi is a Zbs single-bit invert instruction. The bit index comes from the immediate field.
These instructions are part of a B-extension subset and operate on XLEN-wide integer register values.
The immediate field width depends on XLEN; RV32 encodes 0..31 and RV64 encodes 0..63.
binvi changes one selected bit and leaves the other bits from rs1 unchanged.
Common Usage Scenarios
Immediates & Constants
Understand this scenario with real code like «binvi x10, x11, 7 ; x10 = x11 ^ (1 << 7)».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is I-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
The immediate field width depends on XLEN; RV32 encodes 0..31 and RV64 encodes 0..63.
binvi changes one selected bit and leaves the other bits from rs1 unchanged.
FAQ
How is the bit index selected for binvi?
The immediate encodes the bit position directly, with the legal range determined by XLEN.