Does bseti access memory?
No data-memory access occurs. The data operation reads integer registers and writes rd; a result directed to x0 is discarded.
BSETI
RISC-V BSETI Instruction Details
Instruction ManualI-typeSet single bit by immediate index
Instruction Syntax
bseti rd, rs1, shamt
rd and rs1 select x0–x31; sources are read before writeback, and x0 writes are discarded.
shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved. It is not a signed 12-bit operand.
Requires Zbs 1.0 on RV32/RV64; set the selected bit to 1 and preserve the other rs1 bits; an already-set bit stays 1.
ZbsBit ManipulationSingle-Bit Operation
Related Search Terms
Instruction Behavior
bseti is a Zbs single-bit set instruction. The bit index comes from the immediate field.
BSETI Decode And Execute Animation
Starts with machine-code field decoding, then shows operand reads, instruction-specific execution, and ISA-visible state update.
rd
rs1
shamt
bseti
,
,
Execution Context
This example uses fixed initial register values and PC=0x2000; instruction fetch succeeds, with no asynchronous interrupt or extra extension checks. Exception branches stop ordinary commit; post-trap PC and handler state are EEI-dependent.
a0(x10)
0x00001000
31..25
24..20
19..15
14..12
11..7
6..0
0010100
fixed imm[11:5]
01100
shamt[4:0]
01010
rs1
001
funct3
00101
rd
0010011
opcode
Execution Data Path
instruction
0x28C51293
opcode
0010011 -> OP-IMM
funct3
001 -> BSETI
imm[11:5]
imm[11:5]=0010100 fixed
rd / rs1
t0(x5) / a0(x10)=0x00001000
imm[11:5] + shamt[4:0]
imm[11:5]=0010100 fixed -> index=12
single-bit set
Not computed
x5
t0(x5) = 0x00003001; pc = 0x00002000
Current Step
Concept Step: receive the 32-bit instruction encoding
The machine code is split by the current instruction format; the animation starts from encoding/decode.
encoding: 0x28C51293
syntax : bseti t0(x5), a0(x10), 12
Pending result: Not computed
Current architectural state
t0(x5) = 0x00003001; pc = 0x00002000
This animation shows ISA-visible decode and state changes, not any specific CPU pipeline, cache, prediction, or timing implementation.
Quick Understanding & Search Notes
bseti is a Zbs single-bit set instruction. The bit index comes from the immediate field.
This instruction belongs to Zbs 1.0 on RV32 and RV64 and operates on XLEN-bit integer register values.
shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved.
bseti sets the selected bit to 1 and leaves the other rs1 bits unchanged; an already-set bit stays 1.
Common Usage Scenarios
Bit Operations & Masks
RV32/RV64 Zbs, x11=0x20: bseti x10, x11, 5 writes x10=0x20 because bit 5 is already 1.
Pre-Use Checklist
Syntax Check
- rd and rs1 select x0–x31; sources are read before writeback, and x0 writes are discarded.
- shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved. It is not a signed 12-bit operand.
Semantic Check
- Requires Zbs 1.0 on RV32/RV64; set the selected bit to 1 and preserve the other rs1 bits; an already-set bit stays 1.
Pitfalls / Common Confusions
shamt is a nonnegative bit index: 0–31 on RV32 or 0–63 on RV64; RV32 encodings with shamt[5]=1 are reserved.
bseti sets the selected bit to 1 and leaves the other rs1 bits unchanged; an already-set bit stays 1.
FAQ
How is the bit index selected for bseti?
The immediate encodes the bit position directly, with the legal range determined by XLEN.