C.EBREAK

RISC-V C.EBREAK Instruction Details

Instruction ManualC

Compressed breakpoint instruction that performs the same environment-break operation as EBREAK.

Instruction Syntax

c.ebreak
Operand Breakdown
Compressed instructions are 16 bits; registers are often limited to x8–x15.
Immediate fields are narrower. Refer to the full encoding for this compressed instruction.
CCompressed Instruction

Instruction Behavior

C.EBREAK is the 16-bit CR-format breakpoint instruction in the C extension and performs the same operation as EBREAK. Unless an external debug environment overrides it, it raises a synchronous Breakpoint exception and performs no other operation. It has no operands and does not read or write GPRs.

C.EBREAK Decode And Trap Animation

Starts from the 16-bit CR encoding, then shows fixed fields, execution context, synchronous exception, and EPC/cause state update.

no explicit operands
c.ebreakc.ebreak
Execution Context
0x9002 (C.EBREAK) -> Breakpoint
EPC=0x0000000000002000; unless an external debug environment overrides it, this raises a synchronous Breakpoint exception.
15..12
11..2
1..0
1001
funct4
0000000000
fixed zero
10
C2
instruction
0x9002 (16-bit)
opcode
10 -> C2 quadrant
CR fixed bits
funct4=1001; bits 11..2=0
fixed
CR format: rd/rs1=0 and rs2=0
context
mode=M, pc=0x0000000000002000
exception
Breakpoint (code 3)
state
receiving privilege mode EPC=0x0000000000002000; receiving privilege mode cause=3
next EPC
if continuing after instruction: 0x0000000000002002

This animation shows only ISA-visible synchronous exception and state recording; syscall ABI, debugger action, trap-handler policy, and timing are execution-environment or privileged-architecture matters.

Quick Understanding & Search Notes

C.EBREAK is the compressed encoding form of EBREAK for breakpoint/debug entry; it is not an ignorable hint.

C.EBREAK uses the 16-bit CR format: funct4=1001, bits[11:2]=0, and bits[1:0]=10; the shared CR rd/rs1 and rs2 fields are both x0.
It performs the same operation as EBREAK: unless an external debug environment overrides it, it raises a synchronous Breakpoint exception and performs no other operation.
The receiving privilege mode EPC records the C.EBREAK address itself; this synchronous exception does not retire and should not increment minstret.

Common Usage Scenarios

Debug & Monitoring

Understand this scenario with real code like «c.ebreak # trigger debug exception».

System & Privilege

Understand this scenario with real code like «c.ebreak # trigger debug exception».

Pre-Use Checklist

Syntax Check
  • Verify the 16-bit compressed encoding is only available on CPUs supporting the C extension.
  • Confirm C.EBREAK has no explicit operands and its shared CR rd/rs1 and rs2 fields are both x0.
Semantic Check
  • Confirm this instruction raises a synchronous Breakpoint exception rather than performing an ordinary register operation.
  • Confirm the receiving privilege mode EPC records this instruction's own address.

Pitfalls / Common Confusions

C.EBREAK is not an ordinary NOP; executing it causes breakpoint/debug-related control transfer.
It has no rd/rs operands; do not interpret it using C.ADD register semantics.
Unless an external debug environment overrides it, C.EBREAK raises a synchronous Breakpoint exception; the receiving privilege mode EPC records this instruction's address, not the following address.

FAQ

How is C.EBREAK related to EBREAK?

C.EBREAK performs the same environment-break semantics as EBREAK, encoded as a 16-bit compressed form.

Can C.EBREAK be used as NOP?

No. It is a breakpoint instruction.