Is rs2 a VMID for HFENCE.VVMA?
No. rs2 selects guest ASID; the current VMID comes from virtualization context.
HFENCE.VVMA
RISC-V HFENCE.VVMA Instruction Details
Instruction ManualSYSTEM R-typeHypervisor VS-stage translation fence: rs1 selects guest virtual address, rs2 selects ASID, and later local-hart translations are ordered under the current VMID.
Instruction Syntax
hfence.vvma rs1, rs2
Operand Breakdown
rs1: supplies the virtual address; rs1=x0 selects all relevant virtual addresses.
rs2: supplies the ASID; rs2=x0 selects all ASIDs.
This SYSTEM R-type instruction has no rd writeback or immediate field; rs1/rs2 only limit the invalidation scope.
HMemory Management
Instruction Behavior
HFENCE.VVMA is the Hypervisor extension VS-stage memory-management fence, similar in effect to executing SFENCE.VMA for VS-stage under the current VMID. It orders prior stores already visible to the current hart before later implicit reads for VS-stage address translation under the same VMID; rs1≠x0 specifies a guest virtual address and rs2≠x0 specifies a guest ASID. The current VMID comes from virtualization context, not rs2. rs1=x0 selects all guest virtual addresses, and rs2=x0 selects all ASIDs.
HFENCE.VVMA Hypervisor Translation Decode Animation
VS-stage translation fence: shows SYSTEM encoding, rs1/rs2 scope selection, and local-hart fence ordering without modeling TLB or cache implementation.
rs1
rs2
hfence.vvma
,
This example assumes H, equal host/guest XLEN, valid addresses, and maximum implemented ID widths (RV32: ASID 9/VMID 7; RV64: ASID 16/VMID 14). High rs2 bits above the ID width are ignored; software should zero reserved high bits. Implementations may fence/invalidate a broader scope. Current VMID comes from hgatp.VMID; a specified ASID need not invalidate global mappings.
31..25
24..20
19..15
14..12
11..7
6..0
0010001
funct7
01011
rs2/ASID
01010
rs1/GVA
000
funct3
00000
rd=x0
1110011
SYSTEM
Hypervisor Translation State
instruction
0x22B50073
opcode
1110011 -> SYSTEM
funct7
0010001 -> HFENCE.VVMA
rs1
a0(x10) -> GVA 0x0000000040001000
rs2
a1(x11)=0x0000000000000003 -> ASID 3
VMID
current VMID 7 from virtualization context
scope
a0(x10)=0x0000000040001000; a1(x11)=0x0000000000000003 -> ASID 3, current VMID=7; global mappings not required
permission
HS; TVM does not affect this instruction
fence
Fence/invalidation effect not performed yet
complete
Fence/invalidation effect not performed yet
This animation shows only the local-hart translation fence/invalidation semantics defined by the privileged architecture; it does not show OS shootdown protocols, TLB structures, cache flushes, page-walk latency, or platform interrupt mechanisms.
Quick Understanding & Search Notes
HFENCE.VVMA handles VS-stage translation fencing under the current VMID: rs1 selects guest virtual address, rs2 selects ASID, and VMID is not read from rs2.
funct7=0010001, funct3=000, rd=x0, opcode=1110011 identify HFENCE.VVMA.
rs1=x0 selects all guest virtual addresses; rs2=x0 selects all ASIDs.
The current VMID comes from virtualization context; rs2 is not a VMID field.
Common Usage Scenarios
VS-stage page-table sync
Understand this scenario with real code like «hfence.vvma a1, a2 # a1 = guest virtual address; a2 = ASID».
Pre-Use Checklist
Syntax Check
- Confirm the assembly has only rs1 and rs2: this SYSTEM R-type instruction has no rd writeback or immediate field.
- Confirm the rs1/rs2 scope: rs1=x0 selects all virtual addresses, and rs2=x0 selects all ASIDs.
Semantic Check
- Confirm execution is in a permitted privilege state; when an illegal-instruction or virtual-instruction exception occurs, do not treat the invalidation effect as complete.
- Confirm rs1/rs2 only narrow the VVMA invalidation scope; x0/x0 selects the full scope.
Pitfalls / Common Confusions
rs1≠x0 selects a guest virtual address; rs2 selects ASID, while hgatp.VMID supplies the current VMID.
Valid only in M/HS-mode; TVM and VTVM do not trap this instruction. V=1 raises virtual-instruction; U-mode raises illegal-instruction.
Local-hart effect; implementations may cover a broader scope. This is not a generic data-cache flush.
For rs2≠x0, zero reserved high bits; bits above the implemented ID width are ignored. A specified ASID need not cover global mappings.
FAQ
Do HFENCE.VVMA and HFENCE.GVMA select the same address kind?
No. HFENCE.VVMA uses guest virtual address; HFENCE.GVMA with rs1≠x0 uses GPA>>2.