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LHU

RISC-V LHU Instruction Details

Instruction ManualI-type

Load a 16-bit halfword from memory, zero-extend to 32 bits, and write to rd

Instruction Syntax

lhu rd, offset(rs1)
Operand Breakdown
Destination rd: general-purpose register receiving the result.
Source rs1: register holding the first operand.
Immediate imm: 12-bit signed value, sign-extended before operation with rs1.
RV32IMemory Load

Instruction Encoding

31..20
imm[11:0]
19..15
rs1
14..12
funct3
11..7
rd
6..0
opcode

LHU uses opcode 0000011 (0x03), funct3 101. The rs1 field selects the source register, the 12-bit immediate provides the second operand, and rd selects the destination.

Format: I-type
opcode: 0000011 (0x03)
funct3: 101 (0x5)

Instruction Behavior

LHU (I-type, opcode=0000011, funct3=101) loads a 16-bit halfword from memory at the effective address, zero-extends it to 32 bits, and writes to rd. Naturally aligned addresses are multiples of 2. Unlike LH (sign-extension), LHU uses zero-extension.

Quick Understanding & Search Notes

LHU reads a 16-bit halfword from the effective address formed by rs1 plus a signed 12-bit offset, then zero-extends the value into rd.

All base loads form an effective byte address as rs1 plus a sign-extended 12-bit offset.
Naturally aligned accesses should not raise address-misaligned exceptions; misaligned behavior depends on the execution environment interface.

Common Usage Scenarios

Network & Byte Order

Understand this scenario with real code like «lhu x8, 2(x10) # x8 = zero_ext(mem[x10+2][15:0])».

Type Conversion

Understand this scenario with real code like «lhu x8, 2(x10) # x8 = zero_ext(mem[x10+2][15:0])».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is I-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

vs LH: zero-extension vs sign-extension
Natural alignment requires address multiple of 2

FAQ

What offset range does LHU use?

Base load instructions use a sign-extended 12-bit byte offset, typically -2048 through 2047.

What is the difference between signed and unsigned loads?

LB/LH/LW sign-extend the loaded value to XLEN; LBU/LHU zero-extend. On RV64, use LWU when a 32-bit word should be zero-extended.