Check vl first
The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.
VADC.VXM
RISC-V VADC.VXM Instruction Details
Instruction ManualR-typeVADC uses the corresponding v0 bit as carry-in, computes each body element's low SEW-bit sum, and writes vd.
Instruction Syntax
vadc.vxm vd, vs2, rs1, v0
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VVector OperationsInteger Arithmetic
Instruction Behavior
VADC.VXM is the RISC-V V extension vector-scalar add with carry instruction. For each body element within the current vl, it computes vs2 + the second source + v0[i] and writes the low SEW-bit sum to the ordinary vector destination vd. v0 is carry-in arithmetic input, not an ordinary v0.t execution mask; generate carry-out with VMADC.
VADC.VXM Decode And Execute Animation
Starts from OP-V encoding fields, then shows how VADC uses each v0 bit as carry-in, performs SEW-width add-with-carry, and writes the sum.
Instruction input
vadc.vxm
v0
v0
arithmetic input, not execution maskOP-V encodingvadc.vxm
funct6
010000
vm
0
vs2
01000
rs1
01011
funct3
100
vd
00100
opcode
1010111
lane
0
1
2
3
4
5
6
7
v8
0xffff
0x010b
0x011c
0xfffc
0x013e
0x014f
0xfffe
0x0171
+cin
+cin
+cin
+cin
+cin
+cin
+cin
+cin
x11
0x0013
0x0013
0x0013
0x0013
0x0013
0x0013
0x0013
0x0013
cin
1
0
1
1
1
0
1
1
v4
...
...
...
...
...
...
...
...
Current step
Show OP-V 32-bit encoding fields
vadc.vxm uses OP-V encoding. The animation places fixed fields, register fields, vm, and the rs1 field in one encoding strip.
This animation shows only ISA-visible relationships from the official V extension: OP-V field decode, active-element reads, SEW-width integer add-with-carry, v0 carry/borrow input, and vd writeback. It does not model pipelines, caches, or timing.
Quick Understanding & Search Notes
VADC is the data-result instruction for multiword addition: v0 supplies the input bit, vd stores the low SEW-bit result, and VMADC generates the output bit.
OP-V encoding uses funct6=010000 and funct3 selects the .vv/.vx/.vi form.
VADC.VXM uses the corresponding v0 mask bit as carry-in; this is not ordinary v0.t masked execution.
Destination vd is an ordinary vector result; the integer result is truncated to SEW and the output bit is not written by this instruction.
The official V extension reserves encodings where VADC has vd equal to v0.
Vector Execution Context
When reading VADC.VXM, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. The suffix and operand form determine whether sources are vector, scalar, or immediate values.
Then check vtype
The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.
Then check vm/v0
For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.
Common Usage Scenarios
Multi-precision Arithmetic
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vmadc.vim v0, v8, 0 vadc.vxm v10, v8, a1, v0».
Big Integer Add
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vmadc.vim v0, v8, 0 vadc.vxm v10, v8, a1, v0».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
In VADC.VXM, v0 is carry-in arithmetic input, not an ordinary masked-execution element enable.
VADC writes only the low SEW-bit sum; it does not write a carry mask. Use VMADC.
VADC cannot encode vd as v0 because v0 is fixed as carry-in input.
FAQ
Is v0 an execution mask in VADC.VXM?
No. The corresponding v0 bit is carry-in arithmetic input.
What result does VADC.VXM write?
It writes the low SEW-bit sum; carry-out is generated by VMADC.