VFMV.F.S

RISC-V VFMV.F.S Instruction Details

Instruction ManualR-type

Copy element 0 (float) of vs2 to scalar f register rd.

Instruction Syntax

vfmv.f.s rd, vs2
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VZvfhVector OperationsRegister Move

Instruction Behavior

VFMV.F.S copies element 0 of vector source vs2 to floating-point scalar register rd. It is a scalar move, not element-wise FP arithmetic and not FMA.

Quick Understanding & Search Notes

VFMV.F.S moves vector element 0 to a floating-point scalar register.

Do not treat it as element-wise vector arithmetic controlled by the normal execution mask.

Vector Execution Context

When reading VFMV.F.S, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. The suffix and operand form determine whether sources are vector, scalar, or immediate values.

Check vl first

The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.

Then check vtype

The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.

Then check vm/v0

For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.

Official source: RISC-V V Standard Extension for Vector Operations

Common Usage Scenarios

Reduction Result

Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vfmv.f.s ft0, v1 # ft0 = v1[0]».

Scalar-Vector Interface

Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vfmv.f.s ft0, v1 # ft0 = v1[0]».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

Only element 0 is copied, not the whole vector.
The destination is a floating-point scalar register; the integer version is VMV.X.S.

FAQ

Does it copy the whole vector?

No. It reads only element 0 of vs2 and writes floating-point scalar rd.