Check vl first
The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.
VFMV.V.F
RISC-V VFMV.V.F Instruction Details
Instruction ManualV-type (OP-V / OPFVF)Copy scalar f register rs1 to all active elements of vd; tail follows policy.
Instruction Syntax
vfmv.v.f vd, rs1
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VVector OperationsRegister Move
Related Search Terms
Instruction Behavior
VFMV.V.F broadcasts floating-point scalar f[rs1] to all active elements of the vd vector register group. It is fixed at vm=1 with vs2=v0; other vs2 values are reserved. It shares an encoding with VFMERGE.VFM, whose vm is fixed at 0. At SEW=16, this instruction is defined only when Zvfh is implemented.
VFMV.V.F Decode And Execute Animation
This model shows only architecturally visible register movement, fixed encoding, and vstart/vl conditions; it does not simulate NaNs, exception flags, or microarchitecture.
Instruction input
Execution context
FP stateFS enabledFS=Off raises illegal instruction
Encoding fields
funct6=010111 | vm=1 | vs2=00000 (v0) | vs1/rs1=ft0 | funct3=101 | opcode=1010111
hex: 0x5e005257
VFMV.V.F shares an encoding with VFMERGE.VFM; only vm=1 with vs2=v0 is this instruction.
Architectural data path
f[ft0] -> vd[0]..vd[3]
Step 1 / 4
VFMV.V.F uses OP-V; vm is fixed to 1, vs2 is fixed to v0 and other vs2 values are reserved.
Quick Understanding & Search Notes
VFMV.V.F is FP scalar broadcast, writing f[rs1] to the current active elements.
The scalar value is written only to active elements within vl; inactive and tail elements follow the current policies.
VFMV.V.F is encoded as the unmasked scalar splat form, has no execution-mask operand, and does not use v0 for selection.
Vector Execution Context
When reading VFMV.V.F, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. The suffix and operand form determine whether sources are vector, scalar, or immediate values.
Then check vtype
The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.
Then check vm/v0
For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.
Common Usage Scenarios
Vector Init
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vfmv.v.f v1, ft0 # active v1[i] = ft0».
Constant Broadcast
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vfmv.v.f v1, ft0 # active v1[i] = ft0».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is V-type (OP-V / OPFVF).
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
This broadcasts to active elements; it is not an element-0-only move.
It is the fixed vm=1, vs2=v0 unmasked encoding; other vs2 values are reserved.
FAQ
How is it different from VFMV.S.F?
VFMV.S.F writes only element 0; VFMV.V.F broadcasts the scalar to active elements.