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VFMV.S.F

RISC-V VFMV.S.F Instruction Details

Instruction ManualR-type

Copy scalar f register rs1 to vd element 0; remaining elements follow tail policy.

Instruction Syntax

vfmv.s.f vd, rs1
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VZvfhVector OperationsRegister Move
Related Search Terms
VFMV.S.F instructionRISC-V VFMV.S.Fvfmv.s.f syntaxvfmv.s.f RVVFP movescalar move

Instruction Behavior

VFMV.S.F copies floating-point scalar f[rs1] to element 0 of vd; remaining elements are handled according to tail policy. It is a scalar-to-vector-element move, not FMA.

Quick Understanding & Search Notes

VFMV.S.F places one FP scalar into element 0 of a vector register.

Unlike VFMV.V.F, it does not copy the scalar to all active elements.
RISC-V Unprivileged ISA Manual: V Standard Extension for Vector Operations

Vector Execution Context

When reading VFMV.S.F, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. The suffix and operand form determine whether sources are vector, scalar, or immediate values.

Check vl first

The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.

Then check vtype

The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.

Then check vm/v0

For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.

Official source: RISC-V V Standard Extension for Vector Operations

Common Usage Scenarios

Reduction Init

Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vfmv.s.f v1, ft0 # v1[0] = ft0, other elements follow tail policy».

Scalar to Element 0

Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vfmv.s.f v1, ft0 # v1[0] = ft0, other elements follow tail policy».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

Only element 0 is explicitly written; use VFMV.V.F for broadcast.
Other elements follow tail policy; do not rely on unspecified preserved values.

FAQ

Is VFMV.S.F a broadcast?

No. It writes only vd[0]; the broadcast form is VFMV.V.F.