Does VLM.V load SEW-width elements?
No. It loads packed mask bytes and maps each bit to one mask element.
VLM.V
RISC-V VLM.V Instruction Details
Instruction ManualV-typeLoad ceil(vl/8) contiguous bytes from x[rs1] and write the packed bits into the destination mask register.
Instruction Syntax
vlm.v vd, (rs1)
Operand Breakdown
Syntax: vlm.v vd, (rs1), without a v0.t execution mask; vm=1. 32-bit LOAD-FP: opcode=0000111, nf=000, mew=0, mop=00, width=000, lumop=01011.
vd is any single v0–v31 with fixed EEW=8 and EMUL=1. x[rs1] supplies the base, with x0 always 0. Read ceil(vl/8) contiguous bytes, including the whole last byte.
Mask bit i maps to bit i mod 8 of byte floor(i/8). Tails beyond the byte transfer are always tail-agnostic regardless of vta, without guaranteed zeroing.
Require enabled V/VS and valid vtype; vill and vtype constraints on vl still apply. vstart counts bytes; earlier bytes stay unchanged. vstart≥ceil(vl/8) or vl=0 leaves the destination unchanged. Normal completion resets vstart=0.
VVector MemoryMask Operations
Instruction Behavior
VLM.V is the RISC-V V extension unit-stride mask load. It reads a packed mask representation as bytes, with an access size of ceil(vl/8) bytes; mask bit i comes from bit i mod 8 of byte floor(i/8). The instruction loads mask bits, not ordinary vector data elements using the current SEW.
VLM.V Decode And Execute Animation
Decode the packed mask load, then compute each element address as x[rs1] + floor(i/8).
Instruction input
vlm.v
Execution context: packed mask byte count=ceil(VL/8)=2; mask bit i is bit i mod 8 of byte floor(i/8). This form is fixed unmasked with vm=1 in the encoding, and the animation fixes vstart=0 (mask loads and stores count vstart in bytes), LMUL=m1. These are not assembly syntax operands.
Teaching scope: this animation shows only a no-exception packed-mask transfer with vstart=0. Mask loads and stores count vstart in bytes; EEI-defined access-fault or trap outcomes are not modeled by this example.
Teaching context: VLEN=4096, SEW=8, LMUL=m1, VLMAX=512, valid vtype, enabled VS, vstart=0, and no access faults. Fixed EEW=8 and EMUL=1; rs1=x0 fixes the base at 0. VL=0 leaves the destination unchanged; otherwise load all ceil(VL/8) bytes (including every bit of the last byte). Tails beyond the byte transfer are tail-agnostic, without guaranteed zeros. Per-bit steps explain the mapping, not access order or processor cycles.
Encoding fieldsvlm.v / LOAD-FP
31..29
nf
000
28
mew
0
27..26
mop
00
25
vm
1
24..20
lumop
01011
19..15
rs1
01010
14..12
width
000
11..7
vd/vs3
00000
6..0
opcode
0000111
Address and data pathbytes=2, byte=floor(i/8), addr=0x8000+byte
i=0
i=1
i=2
i=3
i=4
i=5
i=6
i=7
i=8
i=9
i=10
i=11
i=12
i=13
i=14
i=15
byte.bit
b0.0
b0.1
b0.2
b0.3
b0.4
b0.5
b0.6
b0.7
b1.0
b1.1
b1.2
b1.3
b1.4
b1.5
b1.6
b1.7
addr
0x8000
0x8000
0x8000
0x8000
0x8000
0x8000
0x8000
0x8000
0x8001
0x8001
0x8001
0x8001
0x8001
0x8001
0x8001
0x8001
mem bit
1
1
0
0
0
0
0
0
0
1
1
0
0
0
0
0
v0
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
...
byte 0 @ 0x8000
0x03
byte 1 @ 0x8001
0x06
Step 1 / 22
Show vector memory instruction encoding
The animation starts from the 32-bit vector memory encoding and shows the official bit fields: nf, mew, mop, vm, rs2/vs2 or lumop/sumop, width, register fields, and opcode.
Quick Understanding & Search Notes
VLM.V restores a packed bitmap from memory into a mask register: with VL=16 it reads only 2 bytes, one bit per lane.
The access size is ceil(vl/8) contiguous bytes addressed from x[rs1].
Mask bit i comes from bit i mod 8 of byte floor(i/8).
The encoding uses the vector-load format with mop=00, width=000, lumop=01011, and vm=1.
Require enabled V/VS, valid vtype (vill=0), and a suitable vl; this form still depends on vtype constraints on vl. vstart counts bytes and resets to 0 on normal completion.
Fixed EEW=8 and EMUL=1; the destination is any single v0–v31. Transfer all ceil(vl/8) bytes, including the whole last byte; destination tails beyond the byte transfer are tail-agnostic regardless of vta. vl=0 leaves the destination unchanged.
Vector Execution Context
Syntax: vlm.v vd, (rs1), without a v0.t execution mask; vm=1. 32-bit LOAD-FP: opcode=0000111, nf=000, mew=0, mop=00, width=000, lumop=01011.
vd is any single v0–v31 with fixed EEW=8 and EMUL=1. x[rs1] supplies the base, with x0 always 0. Read ceil(vl/8) contiguous bytes, including the whole last byte.
Mask bit i maps to bit i mod 8 of byte floor(i/8). Tails beyond the byte transfer are always tail-agnostic regardless of vta, without guaranteed zeroing.
Require enabled V/VS and valid vtype; vill and vtype constraints on vl still apply. vstart counts bytes; earlier bytes stay unchanged. vstart≥ceil(vl/8) or vl=0 leaves the destination unchanged. Normal completion resets vstart=0.
Common Usage Scenarios
Restore packed mask data
Assume enabled V/VS, valid e8,m1, VLEN≥128, vl=9, vstart=0, a0=0x8000, and readable memory bytes [0x81,0x03]. VLM.V reads ceil(9/8)=2 bytes into v0: mask bits 0, 7, 8, and 9 are 1; other loaded bits are 0. Bit 9 is beyond vl but remains part of the loaded last byte. Tails beyond the byte transfer are agnostic, without guaranteed zeros.
Vector mask save/restore
Assume enabled V/VS, valid e8,m1, VLEN≥128, vl=9, vstart=0, a0=0x8000, and readable memory bytes [0x81,0x03]. VLM.V reads ceil(9/8)=2 bytes into v0: mask bits 0, 7, 8, and 9 are 1; other loaded bits are 0. Bit 9 is beyond vl but remains part of the loaded last byte. Tails beyond the byte transfer are agnostic, without guaranteed zeros.
Mask spill/fill
Assume enabled V/VS, valid e8,m1, VLEN≥128, vl=9, vstart=0, a0=0x8000, and readable memory bytes [0x81,0x03]. VLM.V reads ceil(9/8)=2 bytes into v0: mask bits 0, 7, 8, and 9 are 1; other loaded bits are 0. Bit 9 is beyond vl but remains part of the loaded last byte. Tails beyond the byte transfer are agnostic, without guaranteed zeros.
Pre-Use Checklist
Syntax Check
- Syntax: vlm.v vd, (rs1), without a v0.t execution mask; vm=1. 32-bit LOAD-FP: opcode=0000111, nf=000, mew=0, mop=00, width=000, lumop=01011.
- vd is any single v0–v31 with fixed EEW=8 and EMUL=1. x[rs1] supplies the base, with x0 always 0. Read ceil(vl/8) contiguous bytes, including the whole last byte.
Semantic Check
- Mask bit i maps to bit i mod 8 of byte floor(i/8). Tails beyond the byte transfer are always tail-agnostic regardless of vta, without guaranteed zeroing.
- Require enabled V/VS and valid vtype; vill and vtype constraints on vl still apply. vstart counts bytes; earlier bytes stay unchanged. vstart≥ceil(vl/8) or vl=0 leaves the destination unchanged. Normal completion resets vstart=0.
Pitfalls / Common Confusions
The effective transfer size is ceil(vl/8) bytes, not VLEN bytes and not vl SEW-sized elements.
Mask bit i maps to bit i mod 8 of byte floor(i/8); do not read the packed byte stream as element-width accesses.
VLM.V is an unmasked form with vm=1 in the encoding; it has no ordinary v0.t execution mask.
FAQ
Why is the VLM.V access size ceil(vl/8)?
Because each mask element occupies one bit, so VL mask bits are rounded up to a whole number of bytes.