VLM.V

RISC-V VLM.V Instruction Details

Instruction ManualR-type

Load ceil(vl/8) contiguous bytes from memory and place their bits into the destination vector mask.

Instruction Syntax

vlm.v vd, (rs1)
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
VVector LoadMask Operations

Instruction Behavior

VLM.V is the RISC-V V vector mask-load instruction. It reads the compact mask byte sequence, ceil(vl/8) bytes, and maps those bits into the destination mask register. It restores or transfers RVV mask values rather than loading ordinary SEW-sized data elements.

Quick Understanding & Search Notes

VLM.V loads a compact stream of mask bits, not an ordinary integer vector; the memory footprint is determined by vl bits.

The access size is ceil(vl/8) bytes, addressed from x[rs1].
Mask element layout follows the RVV mask-register layout, and element validity is determined by the current vl.
This instruction is an unmasked form with no extra v0 execution mask; destination element coverage is defined by the instruction and current vl.

Common Usage Scenarios

Mask Save/Restore

Understand this scenario with real code like «vlm.v v0, (a0) # load full VLEN-bit mask».

Context Switch

Understand this scenario with real code like «vlm.v v0, (a0) # load full VLEN-bit mask».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

Effective length is ceil(vl/8) bytes, not VLEN bytes.
The destination is treated as a mask value and is tail-agnostic.

FAQ

How does VLM.V handle masking?

It has no ordinary v0 execution mask; if a mask operand appears in the syntax, that operand is data, not an extra execution mask.