Check vl first
The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.
VMADD.VX
RISC-V VMADD.VX Instruction Details
Instruction ManualR-typeMultiply the old vd by vs1/scalar, then add vs2.
Instruction Syntax
vmadd.vx vd, vs2, rs1, vm
Operand Breakdown
vd: mask destination register, with one Boolean result bit per element.
vs2/vs1 or scalar source: compared at the current SEW.
vm: vm=0 uses v0 to restrict participating elements, and vm=1 is unmasked.
VVector IntegerMultiply-Add
Instruction Behavior
VMADD.VX is a destructive RISC-V V integer multiply-add instruction. It computes vd[i] = vs2[i] + vd[i] * the second operand. Multiplication and addition produce the low SEW-width result and do not set integer exception flags.
Quick Understanding & Search Notes
VMADD.VX writes only active elements; integer overflow keeps the low SEW bits and does not trap.
Vector-scalar .vx forms use x[rs1], while vector-vector .vv forms use vs1.
Results are written at SEW width; high-half multiply explicitly returns the high SEW bits of the 2*SEW product.
vm=0 uses v0 as the execution mask and vm=1 is unmasked; inactive and tail elements follow the current vma/vta policy.
Vector Execution Context
When reading VMADD.VX, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. .vx: one vector source and one integer scalar source participate.
Then check vtype
The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.
Then check vm/v0
For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.
Common Usage Scenarios
Polynomial Evaluation
Understand this scenario with real code like «vmadd.vx v8, v4, a1».
Scale-Accumulate
Understand this scenario with real code like «vmadd.vx v8, v4, a1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Same overwrite as vmadd.vv, but multiplier from scalar
FAQ
How does VMADD.VX handle masking?
With vm=0, v0 selects active elements; with vm=1, all body elements participate. Inactive and tail elements follow the current policies.