How does VMV1R.V handle masking?
It has no ordinary v0 execution mask and does not execute by current vl; it copies the whole register.
VMV1R.V
RISC-V VMV1R.V Instruction Details
Instruction ManualR-typeCopy one whole vector register group, independent of current vl or element masks.
Instruction Syntax
vmv1r.v vd, vs2
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
VVector Data MovementWhole Register
Instruction Behavior
VMV1R.V is a RISC-V V whole-register move instruction. It copies one complete vector register from vs2 to vd for saving, restoring, or rearranging vector-register contents; it copies by register group, not by current element vl.
Quick Understanding & Search Notes
VMV1R.V copies whole vector-register contents; it does not select elements by vl, SEW, or v0 masking.
This instruction has no vm operand and copies whole registers; current vl and element masks do not limit the copied range.
Whole-register moves copy register groups and are not interpreted by vtype SEW.
Use vmerge for element-wise conditional selection; whole-register moves are for saving, restoring, or rearranging register contents.
Common Usage Scenarios
Compiler Shuffle
Understand this scenario with real code like «vmv1r.v v8, v16».
Context Switch
Understand this scenario with real code like «vmv1r.v v8, v16».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Source and destination register numbers must be aligned for an NREG=1 group.
There is no vm operand; the instruction copies whole registers rather than active elements.