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VNMSUB.VV

RISC-V VNMSUB.VV Instruction Details

Instruction ManualR-type

Vector integer negative multiply-subtract using vd as a multiplicand.

Instruction Syntax

vnmsub.vv vd, vs1, vs2, vm
Operand Breakdown
vd: destination vector register group.
vs2/vs1 or scalar source: selected by suffixes such as .vv, .vx, .vi, or .vf.
vm: when present, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
VVector IntegerMultiply-Subtract
Related Search Terms
VNMSUB.VV instructionvnmsub.vv syntaxvnmsub.vv multiply accumulateRVV multiply accumulatenegative multiply

Instruction Behavior

VNMSUB.VV computes vs2[i] - (vs1[i] * vd[i]) for active elements and writes the low SEW bits back to vd.

Quick Understanding & Search Notes

VNMSUB.VV is a destructive integer multiply-add class instruction; vd participates in the operation and receives the result.

VNMSUB uses old vd as one multiplicand and vs2 as the minuend.
The result is truncated to SEW width and does not raise integer overflow exceptions.
vm=0 uses v0 as the execution mask; vm=1 is unmasked.
RISC-V Unprivileged ISA Manual: V Standard Extension for Vector Operations

Vector Execution Context

When reading VNMSUB.VV, do not stop at the mnemonic. Official V-extension semantics also depend on the current vl, vtype, and mask state. .vv: two vector sources participate element by element.

Check vl first

The current vl determines the number of body elements. Typical code executes vsetvli, vsetivli, or vsetvl before this instruction.

Then check vtype

The current vtype supplies SEW, LMUL, tail policy, and mask policy; these affect element width, register-group size, and inactive/tail destination elements.

Then check vm/v0

For ordinary vector instructions with vm, vm=0 uses v0 as the execution mask and vm=1 is unmasked. A few forms such as VMERGE use v0 as data-selection input.

Official source: RISC-V V Standard Extension for Vector Operations

Common Usage Scenarios

Polynomial Evaluation

Understand this scenario with real code like «vnmsub.vv v8, v4, v12, v0.t».

Signal Processing

Understand this scenario with real code like «vnmsub.vv v8, v4, v12, v0.t».

Pre-Use Checklist

Syntax Check
  • Confirm the current instruction format is R-type.
  • Confirm the operand order matches the example.
Semantic Check
  • Ensure the destination register usage is compatible with the calling convention.
  • Confirm this is not the lower-level form of a pseudo-instruction expansion.

Pitfalls / Common Confusions

vnmsub uses old vd as one multiplicand.
vs2 is the third operand added to the negated product.
The low SEW bits are written and no integer overflow exception is raised.

FAQ

Is vd only a write destination for VNMSUB.VV?

No. This class is destructive: the old vd value participates as an accumulator or multiplicand.