frcsr

RISC-V frcsr Pseudo-Instruction Details

Assembler pseudo-instruction

RISC-V frcsr is an Assembly Manual v0.0.1 pseudo-instruction. It expands to csrrs rd, fcsr, x0; ISA Section 21.2 says it copies fcsr into integer register rd.

What You Write
frcsr rd
Typical Real Expansion
csrrs rd, fcsr, x0

What This Pseudo Instruction Is Saving You From Writing

frcsr rd reads the floating-point control/status register fcsr.

Availability And Extension Conditions

Base Conditions
  • Applies where the described fcsr CSR is implemented.

How To Read The Expansion

Step 1
CSRRS reads fcsr; with rs1=x0, CSRRS does not write that CSR.

Assembly Forms And Real Instructions

This page records the official expansion only; the RISC-V Assembly Programmer's Manual lists these spellings as pseudoinstructions.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

When To Think Of It First

Use frcsr rd to read fcsr.

Pitfalls / Common Confusions

CSRRS always reads the addressed CSR; rs1=x0 suppresses only the write.

FAQ

Is frcsr a separate hardware opcode?

No. the RISC-V Assembly Programmer's Manual lists frcsr as an assembler pseudoinstruction; behavior comes from the listed CSR expansion.

What is the official frcsr expansion?

the RISC-V Assembly Programmer's Manual lists: csrrs rd, fcsr, x0.