RISC-V fscsr Pseudo-Instruction Details
Assembler pseudo-instructionfscsr expands to CSRRW to write fcsr. The two-operand form reads and returns the old value only when rd is not x0; the one-operand form uses x0.
- fscsr rd, rs
- csrrw rd, fcsr, rs
- fscsr rs
- csrrw x0, fcsr, rs
What This Pseudo Instruction Is Saving You From Writing
fscsr rd, rs returns the old fcsr value when rd is not x0 and writes the new value. With rd=x0, including the one-operand form, it writes without reading fcsr.
Availability And Extension Conditions
- Applies where the described fcsr CSR is implemented.
How The Two Forms Differ
Assembly Forms And Real Instructions
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Pitfalls / Common Confusions
FAQ
Is fscsr a separate hardware opcode?
No. the RISC-V Assembly Programmer's Manual lists fscsr as an assembler pseudoinstruction; behavior comes from the listed CSR expansion.
What is the official fscsr expansion?
the RISC-V Assembly Programmer's Manual lists: csrrw rd, fcsr, rs; csrrw x0, fcsr, rs.
Does fscsr rd, rs read the old value when rd=x0?
No. With rd=x0, its CSRRW expansion does not read fcsr or cause CSR-read side effects, but still writes fcsr. It reads and returns the old value only when rd is not x0.