fsflagsi

RISC-V fsflagsi Pseudo-Instruction Details

Assembler pseudo-instruction

Immediate write-fflags pseudo-instruction, expanding to csrrwi rd, fflags, uimm or an x0 form that does not return the old value. It directly writes the floating-point exception flag field.

What You Write

fsflagsi rd, uimm / fsflagsi uimm

Typical Real Expansion

csrrwi rd, fflags, uimm # or write-only form: csrrwi x0, fflags, uimm

What This Pseudo Instruction Is Saving You From Writing

Floating-point state is accessed through CSR instructions; these pseudo-instructions name common fcsr/frm/fflags read and write forms for more readable floating-point environment code.

fsflagsi primarily means "Write exception flags with immediate". It is assembler-level shorthand; when debugging, auditing, or reading machine code, reason from the real expansion and relocation semantics listed on this page.

Official Semantics Checklist

The official assembly manual treats fsflagsi as an assembler-level pseudo-instruction or alias; hardware executes the expanded real instruction sequence.

The real semantics come from the ISA definitions of CSRRWI and the other expanded instructions, not from a separate fsflagsi hardware opcode.

CSR read, write, set, clear, and immediate behavior follows the Zicsr CSRRW/CSRRS/CSRRC instructions and their immediate variants.

Availability And Extension Conditions

Base Conditions

Requires the related floating-point state CSRs
Accesses fflags/frm/fcsr through Zicsr instructions

Single-Instruction Or Standard Form

The target ISA/ABI environment supports the relevant floating-point extension and CSR access

Fallback / Boundary

Without the corresponding floating-point state or CSR access permission, do not assume these pseudo-instructions are available.

Notes

Writing frm, fflags, or fcsr can affect later floating-point results or exception flags.

How To Read The Expansion

Step 1

rd form: CSRRWI writes the 5-bit immediate to fflags and returns the old fflags in rd.

Step 2

Form without rd: CSRRWI writes the 5-bit immediate to fflags and does not return the old fflags into x0.

What You May See In objdump / Disassembly

Tools may show frcsr/fscsr/frrm/fsrm/frflags/fsflags pseudo names or the underlying CSRRS/CSRRW/CSRRWI instructions.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual

RISC-V Unprivileged ISA Manual

When To Think Of It First

Save or restore the floating-point environment

Read floating-point exception flags for diagnostics

Switch dynamic rounding mode

Write runtime-library, math-library, or low-level test code

Pitfalls / Common Confusions

These pseudo-instructions require the implementation to support the related floating-point state; do not assume availability without the relevant extension

Writing frm/fflags/fcsr can affect later floating-point results or exception flags

Immediate forms are still limited by the 5-bit CSR immediate field

FAQ

Is fsflagsi a real RISC-V instruction?

fsflagsi is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.

What is the main trap when using fsflagsi?