RISC-V fsflags Pseudo-Instruction Details

Assembler pseudo-instruction

fsflags uses CSRRW forms for fflags at fcsr bits 4:0.

What You Write

fsflags rd, rs fsflags rs

Expansion By Form

fsflags rd, rs: csrrw rd, fflags, rs
fsflags rs: csrrw x0, fflags, rs

What This Pseudo Instruction Is Saving You From Writing

Assembler spellings for the two fflags access forms.

How The Two Forms Differ

Form 1

fsflags rd, rs expands to csrrw rd, fflags, rs; when rd is not x0, it reads and saves the old fflags value, then writes the new value.

Form 2

fsflags rs expands to csrrw x0, fflags, rs; it writes fflags without reading that CSR.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual v0.0.1, Chapter 30 Table 6

RISC-V Unprivileged ISA Manual 20260120, Section 6.1

FAQ

What are the official fsflags expansions?

fsflags rd, rs expands to csrrw rd, fflags, rs; fsflags rs expands to csrrw x0, fflags, rs.