RISC-V jalr Pseudo-Instruction Details
Assembler pseudo-instructionOmitted-operand forms of JALR, commonly defaulting to ra as the link register and offset 0. It is used for indirect calls through a target address held in a register.
What This Pseudo Instruction Is Saving You From Writing
Function pointers, PLT stubs, and register-indirect calls often use rd=ra or imm=0; the pseudo forms make those common cases concise.
Official Semantics Checklist
Toolchain And Linker Boundaries
How To Read The Expansion
What You May See In objdump / Disassembly
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Pitfalls / Common Confusions
FAQ
Is jalr a real RISC-V instruction?
jalr is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.
What is the main trap when using jalr?
JALR clears bit 0 of the target address; do not treat an odd address as the actual jump target