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CSR Bit Fields

RISC-V hidelegh CSR Register

Address 0x613Privilege HypervisorAccess HRW / 32 bits (RV32 only)Hypervisor and virtualization CSRs

hidelegh is the AIA-defined RV32 upper-32-bit alias CSR for hideleg.

Related Search Terms
hidelegh CSRhidelegh 0x613hideleg AIA RV32
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Field Map

Understand hidelegh By Bit Fields

1 key fields
31:0 (CSR bits 63:32 of hideleg)

HIDELEG_HIGH

HRW

AIA-defined upper-half alias for hideleg; the detailed writability and interrupt-delegation semantics of this half are defined by AIA hideleg.

HIDELEG_HIGH (bits 31:0 (CSR bits 63:32 of hideleg)) — AIA-defined upper-half alias for hideleg; the detailed writability and interrupt-delegation semantics of this half are defined by AIA hideleg.

What This Field Controls

  • - AIA-defined upper-half alias for hideleg; the detailed writability and interrupt-delegation semantics of this half are defined by AIA hideleg.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual

What To Check First When Reading This CSR

  • - It exists only with H, AIA, and XLEN=32.
  • - When Smstateen and AIA are implemented together, mstateen0.AIA controls less-privileged access to hidelegh.

Risk Checks Before Writing

  • - Do not treat hidelegh as an independent 64-bit register; it is only the RV32 access path to hideleg[63:32].

Put It Back Into A Real Flow

1

Confirm H, AIA, and RV32.

2

Use the AIA hideleg rules to determine available bits.

3

Read or write the alias bit to access hideleg[63:32].