RISC-V htimedeltah CSR Register

Address 0x615Privilege HypervisorAccess HRW / 32-bit RV32 high halfHypervisor and virtualization CSRs

htimedeltah holds the upper 32 bits of the virtualized time offset.

Related Search Terms

htimedeltah CSR htimedeltah 0x615 htimedelta time offset RV32 high half

Bit Overview

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bit 3 = only bit 3; bits 12..11 = bits 12 down to 11

MSBLSB

Reserved63:32TIMEDELTA31:0RW

Field Map

Understand htimedeltah By Bit Fields

1 key fields

31:0

TIMEDELTA

htimedeltah upper 32 bits of the virtualized time offset.

TIMEDELTA (bits 31:0) — htimedeltah upper 32 bits of the virtualized time offset.

What This Field Controls

- htimedeltah upper 32 bits of the virtualized time offset.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

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Official Basis & Search Notes

htimedeltah is a hypervisor virtual-time offset CSR. It is HS/M-side hypervisor state, not a VS supervisor CSR copy; guest access is governed by the H extension and relevant state-enable, AIA, Sstc, or Smcsrind rules.

htimedeltah address, access class, and width are checked against the official CSR tables: 0x615, HRW, 32-bit RV32 high half.

htimedelta/htimedeltah are not compare registers; they provide the guest time offset.

This CSR is the RV32 high-half access path, not an independent full timer.

When writing, modify only officially defined fields; handle WARL, WLRL, WPRI, and reserved fields according to the official specification and implementation behavior.

RISC-V Privileged Architecture Manual - CSR table RISC-V Privileged Architecture Manual - Hypervisor extension RISC-V Sstc extension

What To Check First When Reading This CSR

- htimedeltah is a Hypervisor-level CSR; its separate address is in the official HRW access class.
- Guest/VS software does not reach this H-level CSR through a supervisor CSR alias; access is controlled by the H extension and relevant optional-extension rules.

Risk Checks Before Writing

- When writing htimedeltah, modify only officially defined target fields and preserve WPRI, reserved, and unchanged fields.

Put It Back Into A Real Flow

Confirm the current software is in an M/HS context that may access Hypervisor CSRs.

Confirm that the H, AIA, Sstc, Smstateen, Smcsrind, or other defining extension is implemented.

Read or write only official fields; whether guest-related access succeeds or traps is controlled by the corresponding extension rules and state-enable state.

FAQ

Can htimedeltah be accessed through a supervisor CSR alias?

Do not treat htimedeltah as a VS CSR copy. It is an H-level CSR; whether guest/VS access to related functionality traps is defined by the H extension and the relevant optional extension.

How is htimedeltah related to time?

It provides a guest time offset, not an interrupt compare value.