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CSR Bit Fields

RISC-V hviph CSR Register

Address 0x655Privilege Hypervisor (H extension)Access HRW / 32-bit, RV32 only; bits 63:32 of its low-half CSRHypervisor and virtualization CSRs

hviph is the RV32 alias for hvip bits 63:32.

Related Search Terms
hviph CSRhviph 0x655RISC-V AIAhviph RV32 high half
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
HVIP_63_3231:0Determined by matching hvien bit: read-only zero or writable
Field Map

Understand hviph By Bit Fields

1 key fields
31:0

HVIP_63_32

Determined by matching hvien bit: read-only zero or writable

Corresponding hvip[63:32]. For interrupts 13-63, a read-only-zero hvien bit requires this hvip bit to be read-only zero; all other bits must be writable.

HVIP_63_32 (bits 31:0) — Corresponding hvip[63:32]. For interrupts 13-63, a read-only-zero hvien bit requires this hvip bit to be read-only zero; all other bits must be writable.

What This Field Controls

  • - Corresponding hvip[63:32]. For interrupts 13-63, a read-only-zero hvien bit requires this hvip bit to be read-only zero; all other bits must be writable.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

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Official Basis & Search Notes

hviph is an AIA hypervisor CSR; it is not a VS CSR alias.

AIA VS-level interrupt rules define field layout, writability, and read-only-zero conditions.
This CSR aliases bits 63:32 of its low-half CSR.
RISC-V Advanced Interrupt Architecture v1.0 - VS-level interrupts

What To Check First When Reading This CSR

  • - This CSR exists only with the H extension and AIA; AIA mstateen0.AIA does not restrict M-mode access.
  • - This high-half CSR is available only when XLEN=32; accessing a high-half CSR when XLEN>32 is illegal.

Risk Checks Before Writing

  • - Write only bits whose matching hvien bits are not read-only zero; the remaining bits are read-only zero.

Put It Back Into A Real Flow

1

Confirm that H and AIA are implemented.

2

Confirm RV32/RV64 and whether each field is read-only zero or implemented writable.