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CSR Bit Fields

RISC-V vstimecmph CSR Register

Address 0x25DPrivilege Hypervisor direct / VS aliasAccess HRW / 32-bit RV32 high halfHypervisor and virtualization CSRs

vstimecmph holds the upper 32 bits of the VS timer compare value.

Related Search Terms
vstimecmph CSRvstimecmph 0x25Dvstimecmp timer compareRV32 high half
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Reserved63:32TIMECMP31:0RW
Field Map

Understand vstimecmph By Bit Fields

1 key fields
31:0

TIMECMP

RW

vstimecmph upper 32 bits of the VS timer compare value.

TIMECMP (bits 31:0) — vstimecmph upper 32 bits of the VS timer compare value.

What This Field Controls

  • - vstimecmph upper 32 bits of the VS timer compare value.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

↗Open Official Manual
Official Basis & Search Notes

vstimecmph is a VS timer-compare CSR. The separate CSR address is for M/HS-side management; when V=1, guest access to the corresponding supervisor CSR is substituted with VS state unless an extension specifies otherwise.

vstimecmph address, access class, and width are checked against the official CSR tables: 0x25D, HRW, 32-bit RV32 high half.
Sstc adds the VS-level vstimecmp CSR, with availability controlled through state such as henvcfg.STCE.
This CSR is the RV32 high-half access path, not an independent full timer.
When writing, modify only officially defined fields; handle WARL, WLRL, WPRI, and reserved fields according to the official specification and implementation behavior.
RISC-V Privileged Architecture Manual - CSR tableRISC-V Privileged Architecture Manual - Hypervisor extensionRISC-V Sstc extension

What To Check First When Reading This CSR

  • - vstimecmph's separate CSR address is in the official HRW access class; a VS/VU guest normally reaches VS state through the corresponding supervisor CSR alias.
  • - Before reading it, confirm that the defining extension such as H, AIA, Sstc, Smstateen, or Smcsrind is implemented.

Risk Checks Before Writing

  • - When writing vstimecmph, modify only officially defined target fields and preserve WPRI, reserved, and unchanged fields.

Put It Back Into A Real Flow

1

Confirm that Sstc/H and relevant enable bits are implemented.

2

On RV32, handle it as the high-half CSR access path.

3

Do not confuse time offset with timer compare state.

FAQ

Is vstimecmph part of 64-bit timer state?

vstimecmph is an RV32 high-half CSR for the upper 32 bits of the corresponding 64-bit state.

How is vstimecmph related to time?

It is VS-level timer-compare state used for guest-supervisor timer interrupt comparison.