Does it use vxrm rounding?
No. VADD is ordinary integer addition; vxrm is for fixed-point rounding instructions.
VADD.VX
RISC-V VADD.VX Instruction Details
Instruction ManualR-typeAdd each integer element to x[rs1]: vd[i] = vs2[i] + x[rs1].
Instruction Syntax
vadd.vx vd, vs2, rs1, vm
Operand Breakdown
Destination rd: register receiving the operation result.
Source rs1: register holding the first operand.
Source rs2: register holding the second operand.
VVector OperationsInteger Arithmetic
Instruction Behavior
VADD.VX performs RVV single-width integer addition. The result keeps the low SEW bits and integer overflow does not trap; use saturating add instructions when saturation is required.
Quick Understanding & Search Notes
VADD.VX is ordinary vector integer addition, not a fixed-point rounding operation. Each active element is added at SEW width and written to vd.
Overflow wraps to the low SEW bits and does not set an exception flag.
The operation applies only to active elements within vl; inactive and tail elements follow the current vma/vta policy.
Except for dedicated mask forms, vm=0 uses v0 as the execution mask and vm=1 is unmasked.
Common Usage Scenarios
Vectorized Loops
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vadd.vx v1, v2, a1».
Array Ops
Understand this scenario with real code like «vsetvli t0, a0, e32, m1, ta, ma vadd.vx v1, v2, a1».
Pre-Use Checklist
Syntax Check
- Confirm the current instruction format is R-type.
- Confirm the operand order matches the example.
Semantic Check
- Ensure the destination register usage is compatible with the calling convention.
- Confirm this is not the lower-level form of a pseudo-instruction expansion.
Pitfalls / Common Confusions
Scalar truncated to SEW bits; upper XLEN-SEW bits ignored. All elements share same scalar value.