jal

RISC-V jal Assembler Alias Details

Assembler alias (one-operand jal)

RISC-V jal offset is an assembler alias for jal x1, offset. JAL writes pc+4 to rd and uses a signed, two-byte-multiple offset with a plus-or-minus 1 MiB range.

What You Write
jal offset
Typical Real Expansion
jal x1, offset

What This Assembler Alias Saves You From Writing

The assembly manual defines this alias for one-operand jal with rd fixed to x1.

How To Read The Expansion

Step 1
jal offset expands to jal x1, offset.
Step 2
The underlying JAL writes pc+4 to rd.

Assembly Forms And Real Instructions

This page covers only the jal offset alias; full JAL is a real instruction.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

When To Think Of It First

Read or write the one-operand jal offset form.

Pitfalls / Common Confusions

This alias fixes only rd=x1; the full JAL instruction still has a general rd operand.
The JAL offset is signed in two-byte multiples, with a plus-or-minus 1 MiB target range.

FAQ

Is the jal on this page a real instruction?

This page covers the jal offset alias, which expands to jal x1, offset. Full JAL is a real instruction.