lga
RISC-V lga Pseudo-Instruction Details
Assembler pseudoinstructionRISC-V lga rd, symbol is an assembler pseudoinstruction for a global-symbol address. Its documented sequence is AUIPC plus a GOT load: ld on RV64 and lw on RV32.
What You Write
lga rd, symbol
Typical Real Expansion
auipc rd, symbol@GOT[31:12]
l{w|d} rd, symbol@GOT[11:0](rd)
What This Pseudo Instruction Is Saving You From Writing
The assembly manual defines lga as a load-global-address pseudoinstruction with a GOT-indirect load sequence.
How To Read The Expansion
Step 1
AUIPC forms the GOT-related high PC-relative part.
Step 2
The following l{w|d} loads through that register; RV32 uses lw and RV64 uses ld.
Assembly Forms And Real Instructions
Read this spelling through the AUIPC and GOT-load sequence shown on this page.
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Read or write the lga rd, symbol global-address spelling.
Pitfalls / Common Confusions
The documented example uses ld on RV64 and lw on RV32.
GOT and relocation are psABI linking conventions, not AUIPC hardware behavior.
FAQ
How do lga loads differ between RV32 and RV64?
The assembly manual example uses ld on RV64 and lw on RV32.