lga

RISC-V lga Pseudo-Instruction Details

Assembler pseudo-instruction

Load-global-address pseudo-instruction that obtains a global symbol address through a GOT PC-relative sequence. The official assembly manual gives AUIPC plus LW on RV32 or LD on RV64 as the base form.

What You Write

lga rd, symbol

Typical Real Expansion

.Llga: auipc rd, %got_pcrel_hi(symbol) l{w|d} rd, %pcrel_lo(.Llga)(rd)

What This Pseudo Instruction Is Saving You From Writing

In PIC and dynamic linking, global symbol addresses may be decided at link or load time; lga lets the toolchain fetch the final address through a GOT entry.

lga primarily means "Load a global symbol address via GOT". It is assembler-level shorthand; when debugging, auditing, or reading machine code, reason from the real expansion and relocation semantics listed on this page.

Official Semantics Checklist

The official assembly manual treats lga as an assembler-level pseudo-instruction or alias; hardware executes the expanded real instruction sequence.

The real semantics come from the ISA definitions of AUIPC and the other expanded instructions, not from a separate lga hardware opcode.

Address-loading relocations such as %pcrel_hi/%pcrel_lo or %got_pcrel_hi must be read with the pairing rules in the assembly manual and psABI.

Toolchain And Linker Boundaries

lga expresses loading a global symbol address through the GOT; whether the final code still uses a GOT load can depend on symbol visibility and linker relaxation.

The GOT-entry load width differs between RV32 and RV64, so read machine code with the target XLEN in mind.

How To Read The Expansion

Step 1

AUIPC uses the PC at .Llga as the base and forms the high part of the GOT entry address with a GOT PC-relative relocation.

Step 2

l{w|d} uses the low 12-bit relocation matched to .Llga to load the symbol address from the GOT entry; RV32 uses LW and RV64 uses LD.

What You May See In objdump / Disassembly

Common disassembly is AUIPC plus lw/ld; tools may also print lga or la. RV32 uses lw and RV64 uses ld.

Official References And Reading Order

This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.

RISC-V Assembly Programmer's Manual

RISC-V ELF psABI

When To Think Of It First

Get global-variable addresses in PIC code

Access preemptible symbols in dynamically linked code

Fetch a symbol final address through a GOT entry

Explain the real path of la in pic mode

Pitfalls / Common Confusions

lga loads the address stored in the GOT entry, not the value of the target object

The second load width differs by RV32/RV64: lw or ld

Do not mix GOT relocations with ordinary pcrel_hi/pcrel_lo relocations

Final form can be affected by linker relaxation and symbol visibility

FAQ

Is lga a real RISC-V instruction?

lga is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.

What is the main trap when using lga?