RVOPcode
Back To CSR WorkbenchView In Register Browser
CSR Bit Fields

RISC-V mtopi CSR Register

Address 0xFB0Privilege MachineAccess MRO / MXLENMachine AIA, timer, and indirect interrupt CSRs

AIA machine top interrupt read-only report CSR for the highest-priority pending-and-enabled machine interrupt.

Related Search Terms
mtopi CSRmtopi 0xFB0RISC-V AIAmachine interruptinterrupt control
Bit Overview
bit 3 = only bit 3; bits 12..11 = bits 12 down to 11
MSBLSB
Reserved63:28RO0IID27:16MROReserved15:8RO0IPRIO7:0MRO
Field Map

Understand mtopi By Bit Fields

4 key fields
MXLEN-1:28

Reserved

RO0

AIA specifies that the other mtopi bits are reserved and read as zeros.

Reserved (bits MXLEN-1:28) — AIA specifies that the other mtopi bits are reserved and read as zeros.

What This Field Controls

  • - AIA specifies that the other mtopi bits are reserved and read as zeros.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

27:16

IID

MRO

Major interrupt identity of the highest-priority pending-and-enabled machine-level interrupt; nonzero only when an interrupt is pending in mip, enabled in mie, and not delegated to a less-privileged level.

IID (bits 27:16) — Major interrupt identity of the highest-priority pending-and-enabled machine-level interrupt; nonzero only when an interrupt is pending in mip, enabled in mie, and not delegated to a less-privileged level.

What This Field Controls

  • - Major interrupt identity of the highest-priority pending-and-enabled machine-level interrupt; nonzero only when an interrupt is pending in mip, enabled in mie, and not delegated to a less-privileged level.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

15:8

Reserved

RO0

AIA specifies that the other mtopi bits are reserved and read as zeros.

Reserved (bits 15:8) — AIA specifies that the other mtopi bits are reserved and read as zeros.

What This Field Controls

  • - AIA specifies that the other mtopi bits are reserved and read as zeros.

Common Values

This field is better understood together with surrounding context than as a fixed memorized enumeration.

7:0

IPRIO

MRO

Priority encoding for the reported interrupt; if all bytes of the machine-level iprio array are read-only zero, a nonzero mtopi may be simplified with IPRIO always 1.

IPRIO (bits 7:0) — Priority encoding for the reported interrupt; if all bytes of the machine-level iprio array are read-only zero, a nonzero mtopi may be simplified with IPRIO always 1.

What This Field Controls

  • - Priority encoding for the reported interrupt; if all bytes of the machine-level iprio array are read-only zero, a nonzero mtopi may be simplified with IPRIO always 1.

Common Values

mtopi report value
0No reportable interrupt

A read of mtopi returning 0 means there is no machine-level interrupt that is pending in mip, enabled in mie, and not delegated to a less-privileged level.

Official Basis & Search Notes

AIA machine top interrupt read-only report CSR for the highest-priority pending-and-enabled machine interrupt.

The official AIA table lists mtopi at 0xFB0, with MRO access and MXLEN width.
mtopi reports the highest-priority pending-and-enabled interrupt for machine level.
mtopi is not affected by the global interrupt-enable bit mstatus.MIE.
This page avoids older generic trap/debug wording.
RISC-V Advanced Interrupt Architecture: Added CSRs

What To Check First When Reading This CSR

  • - Check mtopi address, access class, and width against the official AIA CSR table.
  • - mtopi is not affected by the global interrupt-enable bit mstatus.MIE.

Risk Checks Before Writing

  • - mtopi is read-only; software should not write it.

Put It Back Into A Real Flow

1

Confirm that the hart implements the AIA machine-level interrupt extension.

2

Read mtopi and interpret it according to the AIA definition for top interrupt.

3

Use IID to identify the current highest-priority machine-level interrupt and IPRIO to understand its priority encoding.

FAQ

Is mtopi a standard AIA CSR?

Yes. This page follows the address, access class, and width in the official AIA CSR table.

Can mtopi be written?

No. The official AIA table lists mtopi as MRO read-only; software should only read it and interpret the returned top-interrupt encoding.