RISC-V sltz Pseudo-Instruction Details
Assembler pseudo-instructionSet-if-less-than-zero pseudo-instruction, expanding to slt rd, rs, x0. If rs is less than 0 as a signed value, rd=1; otherwise rd=0.
What This Pseudo Instruction Is Saving You From Writing
Writes a common sign test as a readable pseudo-instruction, using SLT with x0 to produce a 0/1 Boolean result.
Official Semantics Checklist
How To Read The Expansion
What You May See In objdump / Disassembly
Official References And Reading Order
This page treats pseudo-instructions as assembler-level aliases or macros: first read what real instructions they expand to, then use the official ISA manual for the behavior of those real instructions. ABI, relocation, and linker-relaxation details follow the psABI document.
When To Think Of It First
Pitfalls / Common Confusions
FAQ
Is sltz a real RISC-V instruction?
sltz is an assembler pseudo-instruction or alias, not a separate hardware opcode. The “Typical Real Expansion” section lists the official expansion, and behavior is defined by the expanded ISA instructions.
What is the main trap when using sltz?
Uses signed SLT; use SLTU-related forms for unsigned tests